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germanium/dental caries

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ArtículosEnsayos clínicosPatentes
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Laser source with a germanium-based suspended membrane and an integrated waveguide that participates in forming the optical cavity

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TECHNICAL FIELD The technical field of the invention is that of laser sources comprising a germanium-based suspended membrane the optical gain medium of which is located in a central portion that is tensilely stressed by tensioning arms. PRIOR ART In various optoelectronic or microelectronic

Compositions containing organo germanium compounds useful in the prevention of caries

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BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to composition of matter useful in dental hygiene, more specifically in the prevention of caries. 2. Description of the Prior Art One of the significant factors in the formation of caries is the conversion of soluble

Semiconductor devices with shaped cavities for embedding germanium material and manufacturing processes thereof

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CROSS-REFERENCES TO RELATED APPLICATIONS The present application claims priority to Chinese Patent Application No. 201510079513.0, filed on Feb. 13, 2015, entitled "SEMICONDUCTOR DEVICES WITH SHAPED CAVITIES FOR EMBEDDING GERMANIUM MATERIAL AND MANUFACTURING PROCESSES THEREOF", which is incorporated

Shaped cavity for SiGe filling material

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CROSS-REFERENCES TO RELATED APPLICATIONS The present application claims priority to Chinese Patent Application No. 201510175220.2, filed on Apr. 14, 2015, entitled "SHAPED CAVITY FOR SIGE FILLING MATERIAL", which is incorporated by reference herein for all purposes. STATEMENT AS TO RIGHTS TO

Post gate silicon germanium channel condensation and method for producing the same

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TECHNICAL FIELD The present disclosure relates to the manufacture of silicon germanium (SiGe) fin field effect transistor (FinFET) semiconductor devices. The present disclosure is particularly applicable to the 14 nanometer (nm) technology node and beyond. BACKGROUND SiGe provides higher carrier

Post gate silicon germanium channel condensation and method for producing the same

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TECHNICAL FIELD The present disclosure relates to the manufacture of silicon germanium (SiGe) fin field effect transistor (FinFET) semiconductor devices. The present disclosure is particularly applicable to the 14 nanometer (nm) technology node and beyond. BACKGROUND SiGe provides higher carrier

Method for fabricating heterojunction bipolar transistors

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BACKGROUND The present invention relates generally to semiconductor devices and, more particularly, to heterojunction bipolar transistors and methods of manufacturing the same. With advances in high-speed communications and digital signal processing, there is a corresponding need for improved

Method of making a strained structure of a semiconductor device

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TECHNICAL FIELD This disclosure relates to integrated circuit fabrication and, more particularly, to a semiconductor device with a strained structure. BACKGROUND When a semiconductor device, such as a metal-oxide-semiconductor field-effect transistor (MOSFET), is scaled down through various

Method and system for optoelectronics transceivers integrated on a CMOS chip

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FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT [Not Applicable] MICROFICHE/COPYRIGHT REFERENCE [Not Applicable] FIELD OF THE INVENTION Certain embodiments of the invention relate to integrated circuit power control. More specifically, certain embodiments of the invention relate to a method and system

Silicon waveguide on bulk silicon substrate and methods of forming

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BACKGROUND The subject matter disclosed herein relates to optical devices. More particularly, the subject matter relates to silicon-based optical devices. As devices relying upon integrated circuits (ICs) have increased in complexity and functionality, those devices have required ever more dynamic

Isolation of bulk FET devices with embedded stressors

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BACKGROUND The present invention relates to field effect transistor (FET) formation, and more specifically, to isolation of bulk FET devices with embedded stressors. FET devices, such as finFETs and nanosheet FETs, include a channel region between the source and drain regions. Current in the channel

Interconnected hollow nanostructures containing high capacity active materials for use in rechargeable batteries

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BACKGROUND High capacity electrochemically active materials are desirable for battery applications. However, these materials exhibit substantial volume changes during battery cycling, e.g. swelling during lithiation and contraction during delithiation. For example, silicon swells as much as 400%

Interconnected hollow nanostructures containing high capacity active materials for use in rechargeable batteries

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BACKGROUND High capacity electrochemically active materials are desirable for battery applications. However, these materials exhibit substantial volume changes during battery cycling, e.g. swelling during lithiation and contraction during delithiation. For example, silicon swells as much as 400%

Interconnected hollow nanostructures containing high capacity active materials for use in rechargeable batteries

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BACKGROUND High capacity electrochemically active materials are desirable for battery applications. However, these materials exhibit substantial volume changes during battery cycling, e.g. swelling during lithiation and contraction during delithiation. For example, silicon swells as much as 400%

Forming nanosheet transistor using sacrificial spacer and inner spacers

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TECHNICAL FIELD The present invention relates generally to a method for fabricating nanosheet transistors and a structure formed by the method. More particularly, the present invention relates to a method for fabricating nanosheet transistors using a sacrificial spacer and inner spacers and a
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